168 or 184-pin
DIMMs have a 64-bit data bus (actually 2 * 32). DIMMs may be installed
singly
FYI - to
the system, a single DIMM slot contains two banks and
(depending whether the DIMM is single or double sided) a single module
may fill both of them.

Banking
facts
- Each memory package within a bank must have similar characteristics
- capacity, speed, enhancements
- Not all memory is of equal quality
- Not all memory plays well together
Rambus DRAM
RDRAM - all new memory architecture. Not backward compatible. Narrow bus (16-bit or 32-bit) that moves very fast. Must have new chipset and physical connectors.
The bus is Rambus is significant. This memory technology works much like a network, sending packets of data along the bus.
Mostly Intel support. Expensive. 400-800MHz. Note that the newest RDRAM technology uses 32-bit data bus width.
Supported by Intel 820, 840 and 850 (and up) chipsets
Dual channel must be installed in pairs
Double Data Rate DRAM
DDRAM Manufacturing is backward compatible with single data rate RAM or standard SDRAM. Implementation requires new chipset. Uses a 64-bit bus that moves pretty fast (133-200).
The key is that it transfers data on both the rising and falling clock signal 133 * 2 = 266MHz.

Clock Signal
Making some sense out of RAM Speed
SIMMs
Older DRAM (SIMM) is sold based on access time measured in nanoseconds (billionth of sec) - smaller the number the better - 60ns is better than 70ns. It's sort of like runners in a foot race; the runner with the fastest time wins the trophy!
DIMMs
Typical SDRAM (DIMM) is sold based on FSB speed. Note that for this kind of RAM, the larger the number the better. This number is based on bus speed - a higher number means faster! An example would be PC133.
RIMMs and DDR DIMMs
More modern RIMMs and DDR SDRAM are sold based on "bandwidth" or amount of data transferred per second. In these cases the numbers would look really big - like PC2100 or PC3500.
The math is (effective bus speed * bus width) / 8
(200MHz * 64-bit FSB width) / 8 bits in a byte = 1600
The effective bus speed on a single-pumped system is the actual clock/bus speed. On a double or quad-pumped system, then the effective bus speed is the clock speed times the pump-factor (I made that term up ;-).
Can we have too much RAM?
Physical - MOBOs are designed with a RAM limit. See your documentation.
Logical - Some operating systems (Win9x) may choke on too much RAM. With installed RAM greater than 512MB the computer may stop responding (hang) while Windows is starting, or halt and display the following error message:
- Insufficient memory to initialize windows. Quit one or more memory-resident programs or remove unnecessary utilities from your CONFIG.SYS and AUTOEXEC.BAT files, and restart your computer.
Workaround: start / run / msconfig / advanced / limit ram
Way too much RAM
Win9x is not designed to run with more that 1GB of RAM. With this much RAM your system will continuously reboot.
Workaround: limit RAM or use LINUX, XP or 2000
So the answer is, YES!
Fetching from the Big Grid
| |
A |
B |
C |
1 |
1 |
0 |
1 |
2 |
0 |
1 |
1 |
3 |
0 |
0 |
0 |
A bit in RAM is accessed much like the way you would locate a specific cell in a spreadsheet
- One of the gotchas with RAM is that the system uses the same address wires to specify the row and column of an address.
- To access a specific RAM cell, the system first supplies the row and then the column of the cell
Old Stuff - SIMMs
In the beginning there was DRAM
may still be Very A+
FPM (fast page)
- MOBO must be designed to take advantage of it - although you can usually still use it
- Multiple read/writes to adjacent memory cells (rows)
EDO (Extended Data Out or hyper page)
EDO memory can, in effect, be busy reading one address while setting up access for the next - extending the time the data has to get out of memory.
- MOBO must be designed to take advantage of it - although you can usually still use it
- Dont mix - you will run at the lowest common denominator
- Faster back to back accesses.
- 2%-20% boost (depending on cache)
These types of DRAM are all asynchronous not tied to the CPU clock
New Stuff - SyncDRAM or SDRAM
(do not confuse with SRAM or even SPAM ;-)
Now this was a big deal!
- Synchronous, tied to system clock - less waiting
- Can access one bank while setting up another
- Pipelines instructions from memory controller
- 4 to 6 times faster than DRAM
- Rated in clock speed - 66Mhz - 100Mhz - 133Mhz or bandwidth
Registered or Buffered memory for this type of SDRAM module, the clock signal is boosted across the entire array of memory chips so that the computer sees a clean sharp clock signal instead of a weakening clock signal as it progresses along the length of the memory path.
Registered memory must be supported by the system board and cannot be mixed with "Unbuffered" modules. Mostly for high-end stuff like servers with 32 or more "sticks" of RAM.
PARITY and Error Checking
Although limited error checking is better then none at all, parity is not usually an option for modern systems. Moderns systems may use another mechanism called error checking and correcting (ECC).
ECC not only finds errors, it can also correct single-bit errors - Very A+. This feature must be supported by the DIMM and the MOBO chipset.
- You will pay more and take about a 2% system performance hit
- You can sometimes use ECC DIMMs in a non-ECC motherboard - they just won't do any ECC!
- Check out MOBO documentation
- On DIMMS if total # of chips is divisible by three it is an error checking
- 36-bit SIMMS or 72-bit DIMMs are ECC
Memory Miscellany
Don't mix tin and gold pins! Corrosion!
YYWW
Speed in NS written on individual chips (-7 or 70)
Bad memory can cause strange problems
Buying Memory (talking the talk)
You may see the size of your module written in the format
16 x 64 (the first number is the bit depth the second the bit width)
16 x 72
In this format, the second number gives the width of the data path in bits. If this number is divisible by nine, it is a parity or ECC module; otherwise, it is a non-parity module.
You can determine the size of your module from this format by multiplying the two numbers together, then dividing by eight or nine, whichever results in an even number. This gives you the size of your module in megabytes (MB).
Simple Memory Glossary
Refresh we know that already
Latency - the initial setup time required to access a specific memory cell. The main component of latency is the time required setting up the row and then the column to be accessed.
This is often noted on DRAM as CAS2 or CAS3 CAS2 having the lowest latency. Geek alert: CAS2 uses two clock cycles to initially set up a RAM read, CAS3 uses three.>/FONT>
Access time - The time a program or device takes to locate a single piece of information and make it available to the computer for processing - for memory it includes refresh & latency.
Burst Any access where once the read is set up, several additional cells may be read without incurring additional set up time. In cycles: 5-1-1-1.
SIMM has notch on one side
- Put in at angle and then stand it up
- DIMM has offset notch on pins
- Voltage / buffering done with the notch
- Put in straight down and snap. Tabs will indicate firm connection

The notches on the DIMM will shift between left, center, or right to identify the type and also to prevent the wrong type from being inserted into the DIMM slot on the motherboard. You must tell your retailer the correct DIMM type before purchasing. This motherboard supports four clock signals.